1. Technical Field of the Invention
The present invention relates to the field of testing circuitry, and more particularly to testing circuitry for verifying the internal logic of an integrated circuit.
2. Description of Related Art
Prior to the shipping of an integrated circuit, or after the installation of the integrated circuit in a system, it is often desirable to test the internal logic contained in the integrated circuit to verify its proper operation. This is becoming more difficult, however, due to the increasing complexity of the logic in current integrated circuits, and the increased number of functions provided in the integrated circuits.
An additional obstacle to verifying the correct operation of the internal logic of an integrated circuit is the increasing speeds of the integrated circuits. It is normal in test circuitry to "exercise" the integrated circuits off-line to verify or debug the circuit. Off-line exercising involves providing inputs to the internal logic of an integrated circuit and determining how the internal logic reacts to these inputs. The high speeds achieved by current integrated circuits makes this off-line exercising to verify or debug the circuit difficult, if not impossible, to perform. State machines provided in the integrated circuit change state too quickly for a microprocessor coupled to the integrated circuit to be assured of reading a particular state and checking the current status of logic in the integrated circuit when the state machine is in that particular state.